As used herein, the abbreviation “SiOI” refers to silicon-on-insulator. The abbreviation “SOI” refers to semiconductor-on-insulator in general, including but not limited to SiOI. The abbreviation “SiOG” refers to silicon-on-glass. The abbreviation “SOG” refers to semiconductor-on-glass in general, including but not limited to SiOG. SOG is intended to include semiconductor-on-ceramics and semiconductor-on-glass-ceramics structures. Likewise, SiOG is intended to include silicon-on-ceramics and silicon-on-glass-ceramics structures.
SiOI technology is becoming increasingly important for high performance thin film transistors, solar cells, and displays, such as active matrix displays. The SiOI wafers typically consists of a thin layer of substantially single-crystalline silicon generally 0.1-0.3 microns in thickness but, in some cases, as thick as 5 microns, on an insulating material.
Various ways of obtaining such a SiOI wafer include epitaxial growth of Si on lattice matched substrates; bonding of a single-crystalline wafer to another silicon wafer on which an oxide layer of SiO2 has been grown, followed by polishing or etching of the top wafer down to, for example, a 0.1 to 0.3 micron layer of single-crystalline silicon; or ion-implantation methods in which either hydrogen or oxygen ions are implanted either to form a buried oxide layer in the silicon wafer topped by Si in the case of oxygen ion implantation or to separate (exfoliate) a thin Si layer to bond to another Si wafer with an oxide layer as in the case of hydrogen ion implantation. Of these three approaches, the approaches based on ion implantation have been found to be more practical commercially. In particular, the hydrogen ion implantation method has an advantage over the oxygen implantation process in that the implantation energies required are less than 50% of that of oxygen ion implants and the dosage required is two orders of magnitude lower.
Exfoliation by the hydrogen ion implantation method was initially taught in, for example, Bister et al., “Ranges of the 0.3-2 KeV H+ and 0.2-2 KeV H2+Ions in Si and Ge,” Radiation Effects, 1982, 59:199-202, and has been further demonstrated by Michel Bruel. See Bruel, U.S. Pat. No. 5,374,564; M. Bruel, Electronic Lett., 31, 1995, 1201-02; and L. Dicioccio, Y. Letiec, F. Letertre, C. Jaussad and M. Bruel, Electronic Lett., 32, 1996, 1144-45.
The hydrogen ion implantation method typically consists of the following steps. A thermal oxide layer is grown on a single-crystalline silicon wafer. Hydrogen ions are then implanted into this wafer to generate subsurface flaws. The implantation energy determines the depth at which the flaws are to be generated and the dosage determines flaw density. This wafer is then placed into contact with another silicon wafer (the support substrate) at room temperature to form a tentative bond.
The wafers are then heat-treated to about 600° C. to cause growth of the subsurface flaws for use in separating a thin layer of silicon from the Si wafer. The resulting assembly is then heated to a temperature above 1000° C. to fully bond the Si film with SiO2 underlayer to the support substrate, i.e., the un-implanted silicon wafer. This process thus forms a SiO2 structure with a thin film of silicon bonded to another silicon wafer with an oxide insulator layer in between.
Cost is an important consideration for commercial applications of SOI and SiOI structures. To date, a major part of the cost of such structures has been the cost of the silicon wafer which supports the oxide layer, topped by the Si thin film, i.e., a major part of the cost has been the support substrate.
Although the use of quartz as support substrate has been mentioned in various patents (see U.S. Pat. Nos. 6,140,209, 6,211,041, 6,309,950, 6,323,108, 6335,231 and 6,391,740), quartz is itself a relatively expensive material. In discussing support substrates, some of the above-references have mentioned quartz glass, glass, and glass-ceramics. Other support substrate materials listed in these references include diamond, sapphire, silicon carbide, silicon nitride, ceramics, metals, and plastics.
It is not at all a simple matter to replace a silicon wafer with a wafer made out of a less expensive material in an SOI structure. In particular, it is difficult to replace a silicon wafer with a glass or glass-ceramic or ceramic of the type which can be manufactured in large quantities at low cost, i.e., it is difficult to make cost effective SOG and SiOG structures.
Co-pending, co-assigned U.S. patent application Ser. No. 10/779,582, published as US2004/0229444 A1, describes techniques for making SiOG and SOG structures and novel forms of such structures. Among the numerous applications for the invention are those in such fields as optoelectronics, FR electronics, and mixed signal (analog/digital) electronics, as well as display applications, e.g., LCDs and OLEDs, where significantly enhanced performance can be achieved compared to amorphous and polysilicon based devices. In addition, photovoltaics and solar cells with high efficiency were also enabled. Both the processing techniques and its novel SOI structures significantly lower the cost of an SOI structure.
Another factor significantly affecting the cost of ion-implantation approach to producing SOI, SiOI, SOG and SiOG structures is the efficiency of the ion-implantation process. Traditionally, hydrogen ion implantation or oxygen ion implantation were used, with the former being preferred due to the higher efficiency. However, those traditional ion-implantation processes require the use of narrow ion beams, which lead to long implantation time and high cost. As a result, substitute ion sources were developed and disclosed in the prior art.
For example, U.S. Pat. No. 6,027,988 proposes the use of plasma ion immersion implantation (“PIII”), where the semiconductor substrate such as a silicon wafer is placed in a plasma atmosphere and an electric field, thereby enabling large area simultaneous ion implantation. However, PIII suffers from the drawbacks of surface charging and etching by the plasma and lack of flexibility at higher energy, lack of accurate dosage control, and inability to precisely control the thickness of the ion implantation zone and the thickness of the exfoliation film.
Another alternative to narrow area ion beam implantation is ion shower implantation (ISI). An ion shower is typically a large area ion beam extracted from a plasma source by means of an extraction electrode and an optional post-acceleration system. Ion shower differs from PIII in that it uses a remote plasma, a field-free region around the substrate to be ion-implanted, and a continuous instead of a pulsed ion beam. These features of the ISI system eliminates the surface charging and etching problem of PIII, and enables accurate dosage control.
The present inventors have discovered that, while ISI can achieve quick ion implantation, the use of conventional ISI in the production of SOG structures can lead to unacceptable damage of the thin film upon separation thereof from the substrate. For the manufacture of many semiconductor devices, it is important the integrity of the crystalline lattice of the thin film is substantially maintained during the implantation and upon separation thereof from the substrate.
Therefore, there remains a process for separating a thin film of semiconductor material that is efficient, effective, yet without damaging the desired structure of the thin film. In particular, there remains a process for making SOG structures wherein the ion implantation process can be implemented with efficiency and efficacy.
The present invention satisfies this long-standing need.